Part # 74LS114 datasheet

Part Manufacturer: Motorola


Part Description: 74LS114

Part Details:

SN54/74LS114A DUAL JK NEGATIVEEDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designedso that when the clock goes HIGH, the inputs are enabled and data will be DUAL JK NEGATIVE accepted. The logic level of the J and K inputs may be allowed to change when EDGE-TRIGGERED FLIP-FLOP the clock pulse is HIGH and the bistable will perform according to the truthtable as long as minimum set-up times are observed. Input data is transferred LOW POWER SCHOTTKY to the outputs on the negative-going edge of the clock pulse. LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX CERAMIC CASE 632-08 14 Q Q 1 5(9) 6(8) CLEAR (CD) 4(10) N SUFFIX SET (S TO D) PLASTIC OTHER K CASE 646-06 FLIP-FLOP 2(12) 14 J 3(11) 1 13 CLOCK (CP) D SUFFIX SOIC 14 CASE 751A-02 1 ORDERING INFORMATION MODE SELECT -- TRUTH TABLE SN54LSXXXJ Ceramic INPUTS OUTPUTS SN74LSXXXN Plastic OPERATING OPERA MODE

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74LS114.pdf Datasheet