Part # AD9848 AD9849 datasheet

Part Manufacturer: Analog Devices

Analog Devices

Part Description: AD9848/AD9849 CCD Signal Processors with Integrated Timing Driver Data Sheet REV. A

Part Details:

a CCD Signal Processors with Integrated Timing Driver AD9848/AD9849 FEATURES PRODUCT DESCRIPTION AD9848: 10-Bit, 20 MHz Version The AD9848 and AD9849 are highly integrated CCD signal pro- AD9849: 12-Bit, 30 MHz Version cessors for digital still camera applications. Both include a complete Correlated Double Sampler (CDS) analog front end with A/D conversion, combined with a program- ­2 dB to +10 dB Pixel Gain Amplifier (PxGA®) mable timing driver. The Precision Timing core allows adjustment 2 dB to 36 dB 10-Bit Variable Gain Amplifier (VGA) of high speed clocks with approximately 1 ns resolution. 10-Bit 20 MHz A/D Converter (AD9848) The AD9848 is specified at pixel rates of 20 MHz, and the 12-Bit 30 MHz A/D Converter (AD9849) AD9849 is specified at 30 MHz. The analog front end includes Black Level Clamp with Variable Level Control black level clamping, CDS, PxGA, VGA, and a 10-bit or 12-bit A/D Complete On-Chip Timing Driver converter. The timing driver provides the high speed CCD clock Precision TimingTM Core with 1 ns Resolution @ 20 MSPS drivers for RG and H1­H4. Operation is programmed using a On-Chip 3 V Horizontal and RG Drivers (AD9848) 3-wire serial interface. On-Chip 5 V Horizontal and RG Drivers (AD9849)48-Lead LQFP Package Packaged in a space saving 48-lead LQFP, the AD9848 andAD9849 are specified over an operating temperature range of APPLICATIONS ­20°C to +85°C. Digital Still Cameras FUNCTIONAL BLOCK DIAGRAM VRT VRB VREF 4 6dB 2dB TO 36dB 10 OR 12 CDS PxGA ADC DOUT CCDIN VGA CLAMP CLAMP INTERNAL CLOCKS CLPOB CLPDM PBLK RG PRECISION

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AD9848 AD9849.pdf Datasheet