Part # 74LVX573 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: Low voltage CMOS octal D-type latch (3-state non inv.) with 5V tolerant inputs

Part Details:

74LVX573 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS s HIGH SPEED: tPD=6.4ns (TYP.) at VCC = 3.3V s 5V TOLERANT INPUTS s POWER-DOWN PROTECTION ON INPUTS s INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V s LOW POWER DISSIPATION: SOP TSSOP ICC = 4 µA (MAX.) at TA=25°C s LOW NOISE: Table 1: Order Codes VOLP = 0.3V (TYP.) at VCC =3.3V s SYMMETRICAL OUTPUT IMPEDANCE: PACKAGE T & R |IOH| = IOL = 4 mA (MIN) at VCC = 3V SOP 74LVX573MTR s BALANCED PROPAGATION DELAYS: TSSOP 74LVX573TTR tPLH tPHL s OPERATING VOLTAGE RANGE:VCC(OPR) = 2V to 3.6V (1.2V Data Retention) When the LE is taken low, the Q outputs will be s PIN AND FUNCTION COMPATIBLE WITH latched precisely at the logic level of D input data. 74 SERIES 573 While the (OE) input is low, the 8 outputs will be in s IMPROVED LATCH-UP IMMUNITY a normal logic state (high or low logic level) andwhile high level the outputs will be in a high DESCRIPTION impedance state. The 74LVX573 is a low voltage CMOS OCTAL Power down protection is provided on all inputs D-TYPE LATCH with 3 STATE OUTPUT NON and 0 to 7V can be accepted on inputs with no INVERTING fabricated with sub-micron silicon regard to the supply voltage. gate and double-layer metal wiring C2MOS This device can be used to interface 5V to 3V. It

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74LVX573.pdf Datasheet