Part # AD1892 datasheet download

Part Manufacturer: Analog Devices

Analog Devices

Part Description: AD1892 Data Sheet


Part Details:

a Integrated Digital Receiver/Rate Converter AD1892 FEATURES PRODUCT OVERVIEW Complete EIAJ CP-340 (CP-1201), IEC-958, AES/EBU, The AD1892 combines a CP-1201, CP-340, IEC-958, AES/ S/PDIF Compatible Digital Audio Receiver and EBU, S/PDIF compatible Digital Audio Receiver (DAR) with Asynchronous Sample Rate Converter an asynchronous sample rate converter, allowing the user to Status Pins and Microprocessor Interfaces for specify the output sample rate of the received digital audio infor- Stand-Alone and Microcontroller-Oriented Operation mation. The DAR block features support for both Q-channel Integrated Channel Status Buffer and Q-Channel subcode information (to support CD, CD-R, MD and DAT Subcode Buffer (Supports EIAJ CP-2401) digital audio formats) as well as Channel Status information. A 20-Bit SamplePort® Architecture Provides Superb Jitter microcontroller interface, with an SPI compatible serial port, Rejection on Input Port allows full access to the 80-bit Q-Channel subcode buffer and to Sample Rate Conversion from 8 kHz to 48 kHz with the 32-bit Channel Status buffer, as well as to the control and 1:5 Upsampling Range status registers. Additionally, key status information from the 1:0.85 Downsampling Range incoming subframes and the Channel Status buffer is reported 120 dB Dynamic Range on status output pins on the AD1892, so the AD1892 may be ­113 dB THD+N @ 1 kHz used in systems that do not include a microcontroller or CRC Calculation on Q-Channel Subcode (Consumer microprocessor. Mode Only) and on Channel Status (Pro Mode Only) The asynchronous sample rate converter block is based on Four-Wire SPITM Compatible Serial Control Port market leading AD1890 family SamplePort rate conversion tech- Mute Input Pin nology. The AD1892 offers a 1:5 upsampling range, and will Power-Down Mode downsample from 48 kHz to 44.1 kHz. Input audio word widths Single +5 V Supply up to 20 bits are supported, and output audio word widths of 16 Flexible Three-Wire Serial Data Port with Left-Justified, or 20 are supported, with 120 dB of dynamic range and ­113 dB Right-Justified and I2S-Compatible Modes THD+N. The rate converter inherently rejects jitter on the 28-Lead SOIC Package recovered clocks from the incoming biphase-mark encoded APPLICATIONS stream. Indeed, sample rate conversion is highly synergistic DVD, DAT, MD, DCC and CD-R Recorders and Players


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