Part # AT90USB646 datasheet

Part Manufacturer: Atmel


Part Description: AT90USB646 647 1286 1287

Part Details:

Features· High Performance, Low Power AVR® 8-Bit Microcontroller· Advanced RISC Architecture ­ 135 Powerful Instructions ­ Most Single Clock Cycle Execution ­ 32 x 8 General Purpose Working Registers ­ Fully Static Operation ­ Up to 16 MIPS Throughput at 16 MHz ­ On-Chip 2-cycle Multiplier · Non-volatile Program and Data Memories ­ 64/128K Bytes of In-System Self-Programmable Flash 8-bit · Endurance: 100,000 Write/Erase Cycles Microcontroller ­ Optional Boot Code Section with Independent Lock Bits · USB Bootloader programmed by default in the Factory with · In-System Programming by On-chip Boot Program hardware activated after reset 64/128K Bytes · True Read-While-Write Operation · All supplied parts are preprogramed with a default USB bootloader of ISP Flash ­ 2K/4K (64K/128K Flash version) Bytes EEPROM · Endurance: 100,000 Write/Erase Cycles and USB ­ 4K/8K (64K/128K Flash version) Bytes Internal SRAM ­ Up to 64K Bytes Optional External Memory Space Controller ­ Programming Lock for Software Security · JTAG (IEEE std. 1149.1 compliant) Interface ­ Boundary-scan Capabilities According to the JTAG Standard AT90USB646 ­ Extensive On-chip Debug Support ­ Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface AT90USB647 · USB 2.0 Full-speed/Low-speed Device and On-The-Go Module ­ Complies fully with: AT90USB1286 ­ Universal Serial Bus Specification REV 2.0 ­ On-The-Go Supplement to the USB 2.0 Specification Rev 1.0 AT90USB1287 ­ Supports data transfer rates up to 12 Mbit/s and 1.5 Mbit/s · USB Full-speed/Low Speed Device Module with Interrupt on Transfer Completion ­ Endpoint 0 for Control Transfers : up to 64-bytes ­ 6 Programmable Endpoints with IN or Out Directions and with Bulk, Interrupt or Isochronous Transfers ­ Configurable Endpoints size up to 256 bytes in double bank mode ­ Fully independant 832 bytes USB DPRAM for endpoint memory allocation ­ Suspend/Resume Interrupts ­ Power-on Reset and USB Bus Reset ­ 48 MHz PLL for Full-speed Bus Operation ­ USB Bus Disconnection on Microcontroller Request · USB OTG Reduced Host : ­ Supports Host Negotiation Protocol (HNP) and Session Request Protocol (SRP) for OTG dual-role devices ­ Provide Status and control signals for software implementation of HNP and SRP ­ Provides programmable times required for HNP and SRP

Please click the following link to download the datasheet:

AT90USB646.pdf Datasheet