Part # Brief ST100 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: ST100 DSP cores

Part Details:

ST100 ST100 DSP CORES DATA BRIEF 1 FEATURES ­ Useful instructions for ETSI (European Tele- communications Standards Institute) primi- State-of-the-art DSP core architecture tives in GP32 and GP16: ­ Complete & optimized memory systems ­ VITERBI... ­ Multicore solutions General usage instructions: ­ Standard or specific tightly coupled peripher- als libraries Hardware Loop Controllers Advanced Load/store Architecture ­ Zero cycles overhead for continuous data processing. ­ Regular and efficient. ­ Three nestable loops. ­ Optimized for programming in `C/C++/EC++ languages. Memory Space Two Instruction Sets ­ 32-bit addressing range, 4 Gbytes of memory space. ­ GP16, a 16-bit instruction set. Interrupt, Trap And Context Switching ­ GP32, a 32-bit instruction set. ­ Fast response to external events or system Three Instruction Modes errors. ­ GP16: 2-way superscalar, for compact micro- Protection System controller codes. ­ User mode and Supervisor mode. ­ GP32: 2-way superscalar, for high perfor- Power Saving mance microcontroller codes. ­ Four "IDLE" modes performing power saving ­ SLIW: one SLIW per cycle, where a SLIW operations. (Scoreboarded Long Instruction Word), is abundle of four 2 DESCRIPTION ­ GP32 instruction words. This mode is for high performance vector codes (DSP loops). STMicroelectronics innovative ST100® DSP pro-cessor core architecture has been conceived spe- Predicated Execution For Most Instructions cifically for embedded applications in custom ­ Removes needs of conditional branches. system-on-chip products for demanding markets ­ Compact coding and increased instruction like cellular phones, hard disk drives, engine man-

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Brief ST100.pdf Datasheet