Part # FIN3384 datasheet

Part Manufacturer: Fairchild Semiconductor

Fairchild Semiconductor

Part Description: FIN3385 * FIN3383 * FIN3384 * FIN3386 Low Voltage 28-Bit Flat Panel Display Link Serializers Deserializers

Part Details:

FIN3385 October 2003 Revised April 2005 · FI FIN3385 · FIN3383 · N3383 FIN3384 · FIN3386Low Voltage 28-Bit Flat Panel Display Link · FI Serializers/Deserializers N3384 General Description Features The FIN3385 and FIN3383 transform 28 bit wide parallel s Low power consumption · FI LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low s 20 MHz to 85 MHz shift clock support Voltage Differential Signaling) data streams. A phase- s N3386 r1V common-mode range around 1.2V locked transmit clock is transmitted in parallel with the datastream over a separate LVDS link. Every cycle of transmit s Narrow bus reduces cable size and cost clock 28 bits of input LVTTL data are sampled and trans- s High throughput (up to 2.38 Gbps throughput) mitted. s Internal PLL with no external component Low V The FIN3386 and FIN3384 receive and convert the 4/3 s Compatible with TIA/EIA-644 specification serial LVDS data streams back into 28/21 bits of LVTTL s Devices are offered 56-lead TSSOP packages data. Refer to Table 1 for a matrix summary of the Serializ-ers and Deserializers available. For the FIN3385, at a olt transmit clock frequency of 85MHz, 28 bits of LVTTL data a are transmitted at a rate of 595Mbps per LVDS channel. ge 28- These chipsets are an ideal solution to solve EMI and cablesize problems associated with wide and high-speed TTLinterfaces. Bit F Ordering Code: lat Panel Order Number Package Number Package Description FIN3383MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide FIN3384MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide FIN3385MTD

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FIN3384.pdf Datasheet