Part # HCF40103 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics


Part Details:

HCF40103B 8-STAGE PRESETTABLE SYNCHRONOUS 8 BIT BINARY DOWN COUNTERS s SYNCHRONOUS OR ASYNCHRONOUS PRESET s MEDIUM -SPEED OPERATION : fCL =3.6MHz (Typ.) at VDD = 10V s CASCADABLE s QUIESCENT CURRENT SPECIF. UP TO 20V s 5V, 10V AND 15V PARAMETRIC RATINGS DIP SOP s INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C s 100% TESTED FOR QUIESCENT CURRENT ORDER CODES s MEETS ALL REQUIREMENTS OF JEDEC PACKAGE TUBE T & R JESD13B "STANDARD SPECIFICATIONS DIP HCF40103BEY FOR DESCRIPTION OF B SERIES CMOS DEVICES" SOP HCF40103BM1 HCF40103M013TR CE) input is high. The CARRY-OUT/ZERO DESCRIPTION DETECT (CO/ZD) output goes low when the HCF40103B is a monolithic integrated circuit count reaches zero if the CI/CE input is low, and fabricated in Metal Oxide Semiconductor remains low for one full clock period. When the technology available in DIP and SOP packages. SYNCHRONOUS PRESET ENABLE (SPE) input HCF40103B consists of an 8-stage synchronous is low, data at the JAM input is clocked into the down counter with a single output that is active counter on the next positive clock transition when the internal count is zero. This device regardless of the state of the CI/CE input. When contains a single 8-bit binary counter. It has the ASYNCHRONOUS PRESET ENABLE (APE) control inputs for enabling or disabling the clock, input is low, data at the JAM inputs is for clearing the counter to its maximum count, and asynchronously forced into the counter regardless

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HCF40103.pdf Datasheet