Part # STLS2F02 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: Loongson 2F high performance 64-bit superscalar MIPS® microprocessor

Part Details:

STLS2F02 Loongson 2F high performance 64-bit superscalar MIPS® microprocessor Preliminary Data Features 64-bit superscalar architecture 900 MHz clock frequency Single/double precision floating-point units New streaming multimedia instruction set support (SIMD) 64 Kbyte instruction cache, 64 Kbyte data HFCBGA452 (27x27x2.9mm) cache, on-chip 512 Kbyte unified L2 cache On chip DDR2-667 and PCI-X controller The memory hierarchy is composed by the first 4 W @ 900 MHz power consumption: level of 64 Kbyte 4-way set associative caches for ­ Best in class for power management instructions and data, the second level of ­ Voltage/frequency scaling 512 Kbyte unified 4-way set associative cache ­ Standby mode support and the memory management unit with table ­ L2 cache disable/enable option lookside buffer. Leading edge 90 nm process technology The Loongson microprocessor family is the outcome of a successful collaboration started in 27x27 heat spreader flip-chip BGA package 2004 between STMicroelectronics and the MIPS based (compatible with MIPSIII) Institute of Computing Technology, part of the instruction set Chinese Academy of Science. Loongson microprocessors were co-developed by Description STMicroelectronics and the Institute of Computing Technology to address all the The STLS2F02 is a MIPS based 64-bit applications requiring high level of performance superscalar microprocessor, able to issue four and low power dissipation. instructions per clock cycle among six functional Compared to the STLS2E02 processor, the units: two integer, two single/double-precision STLS2F02 has an enhanced architecture floating-point, one 64-bit SIMD and one load/store providing higher performances, reduced power unit. consumption, integrated DDR2 memory controller The micro architecture is organized with nine and PCI-X bus interface. stages of pipeline and support of dynamic branch prediction. Table 1. Device summary Order code Package

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STLS2F02.pdf Datasheet