Part # MAX3625 datasheet

Part Manufacturer: Maxim

Maxim

Part Description: MAX3625 DS


Part Details:

19-1010; Rev 0; 10/07 EVALUATION KIT AVAILABLE Low-Jitter, Precision Clock Generator with Three Outputs MAX3625 General Description Features The MAX3625 is a low-jitter precision clock generator Crystal Oscillator Interface: 24.8MHz to 27MHz optimized for networking applications. The device inte- CMOS Input: Up to 320MHz grates a crystal oscillator and a phase-locked loop(PLL) clock multiplier to generate high-frequency clock Output Frequencies outputs for Ethernet, 10G Fibre Channel, and other net- Ethernet: 125MHz, 156.25MHz, 312.5MHz working applications. 10G Fibre Channel: 159.375MHz, 318.75MHz Maxim s proprietary PLL design features ultra-low jitter Low Jitter and excellent power-supply noise rejection, minimizing 0.14psRMS (1.875MHz to 20MHz) design risk for network equipment. 0.38psRMS (12kHz to 20MHz) The MAX3625 has three LVPECL outputs. Selectable Excellent Power-Supply Noise Rejection output dividers and a selectable feedback divider allow No External Loop Filter Capacitor Required a range of output frequencies. Applications Ordering Information Ethernet Networking Equipment PKG PART TEMP RANGE PIN-PACKAGE Fibre Channel Storage Area Network CODE MAX3625CUG+ 0°C to +70°C 24 TSSOP U24-1 +Denotes a lead-free package. Pin Configuration and Typical Application Circuit appear atend of data sheet. Block Diagram IN_SEL MR BYPASS SELA[1:0] QA_OE SELA[1:0]SELB[1:0] RESET LOGIC/POR RESET QA FB_SEL


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MAX3625.pdf Datasheet