Part # 74LS113 datasheet

Part Manufacturer: Motorola


Part Description: 74LS113

Part Details:

SN54/74LS113A DUAL JK NEGATIVEEDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monolithic dual flip-flops are designed so that when the clock goes HIGH, theinputs are enabled and data will be accepted. The logic level of the J and K DUAL JK NEGATIVE inputs may be allowed to change when the clock pulse is HIGH and the EDGE-TRIGGERED FLIP-FLOP bistable will perform according to the truth table as long as minimum setuptimes are observed. Input data is transferred to the outputs on the LOW POWER SCHOTTKY negative-going edge of the clock pulse. LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX CERAMIC CASE 632-08 14 1 Q Q 5(9) 6(8) N SUFFIX PLASTIC CASE 646-06 SET (SD) 14 4(10) J K 1 3(11) 2(12) 1(13) CLOCK (CP) D SUFFIX SOIC 14 CASE 751A-02 1 ORDERING INFORMATION MODE SELECT -- TRUTH TABLE SN54LSXXXJ Ceramic SN74LSXXXN Plastic INPUTS OUTPUTS SN74LSXXXD SOIC OPERATING OPERA MODE SD J K

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74LS113.pdf Datasheet