Part # 54AC109 datasheet

Part Manufacturer: National Semiconductor

National Semiconductor

Part Description: 54AC109 54ACT109 Dual J not K not Positive Edge-Triggered Flip-Flop


Part Details:

54AC109 August 1998 54AC109 · 54ACT109 ·54ACT109 Dual JK Positive Edge-Triggered Flip-Flop General Description Simultaneous LOW on C and S makes both Q and Q D D HIGH The AC/ ACT109 consists of two high-speed completely in-dependent transition clocked JK flip-flops. The clocking op-eration is independent of rise and fall times of the clock Features Dual waveform. The JK design allows operation as a D flip-flop n I reduced by 50% CC (refer to AC/ ACT74 data sheet) by connecting the J and K n Outputs source/sink 24 mA inputs together. n ACT109 has TTL-compatible inputs Asynchronous Inputs: JK n Standard Military Drawing (SMD) LOW input to S (Set) sets Q to HIGH level -- AC109: 5962-89551 D Positive LOW input to C (Clear) sets Q to LOW level -- ACT109: 5962-88534 D Clear and Set are independent of clock Logic Symbol IEEE/IEC Edge-T riggered DS100267-1 DS100267-7 Flip-Flop Pin Names Description J , J , K , K Data Inputs 1 2 1 2 CP , CP Clock Pulse Inputs 1 2 C , C Direct Clear Inputs D1


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54AC109.pdf Datasheet