Part # 74LCX16500 datasheet

Part Manufacturer: Fairchild Semiconductor

Fairchild Semiconductor

Part Description: 74LCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs


Part Details:

74LCX16500 Low March 1995 Revised June 2002 74LCX16500Low Voltage 18-Bit Universal Bus Transceivers with V 5V Tolerant Inputs and Outputs oltage 18-Bi General Description Features These 18-bit universal bus transceivers combine D-type s 5V tolerant inputs and outputs latches and D-type flip-flops to allow data flow in transpar- s 2.3V­3.6V VCC specifications provided ent, latched, and clocked modes. s 6.0 ns t Data flow in each direction is controlled by output-enable PD max (VCC = 3.3V), 20 µA ICC max t Univer (OEAB and OEBA), latch-enable (LEAB and LEBA), and s Power down high impedance inputs and outputs clock (CLKAB and CLKBA) inputs. s Supports live insertion/withdrawal (Note 1) The LCX16500 is designed for low voltage (2.5V or 3.3V) s ±24 mA output drive (VCC = 3.0V) VCC applications with the capability of interfacing to a 5V s Uses patented noise/EMI reduction circuitry signal environment. sal s Latch-up performance exceeds 500 mA The LCX16500 is fabricated with an advanced CMOS tech- s ESD performance: Bus T nology to achieve high speed operation while maintainingCMOS low power. Human body model > 2000VMachine model > 200V s Also packaged in plastic Fine-Pitch Ball Grid Array ransc (FBGA) Note 1: To ensure the high-impedance state during power up or down, OEshould be tied to VCC and OE tied to GND through a resistor: the minimum eiver value or the resistor is determined by the current-sourcing capability of thedriver. s wi Ordering Code: th 5V Order Number Package Number Package Description 74LCX16500G BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2)(Note 3) To 74LCX16500MEA 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide MS56A


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74LCX16500.pdf Datasheet