Part # 74LS73 datasheet

Part Manufacturer: Motorola


Part Description: 74LS73

Part Details:

SN54/74LS73A DUAL JK NEGATIVEEDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs areenabled and data will be accepted. The logic level of the J and K inputs may DUAL JK NEGATIVE be allowed to change when the clock pulse is HIGH and the bistable will per- EDGE-TRIGGERED FLIP-FLOP form according to the truth table as long as minimum set-up times are ob-served. Input data is transferred to the outputs on the negative-going edge of LOW POWER SCHOTTKY the clock pulse. LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX CERAMIC CASE 632-08 14 1 Q Q 13 (8) 12 (9) N SUFFIX CLEAR PLASTIC 2 (6) K CASE 646-06 14 J 3 (10) 14 (7) 1 1 (15) CLOCK (CP) D SUFFIX SOIC 14 CASE 751A-02 1 ORDERING INFORMATION SN54LSXXJ Ceramic SN74LSXXN Plastic MODE SELECT -- TRUTH TABLE SN74LSXXD SOIC INPUTS OUTPUTS OPERATING OPERA MODE CD J K

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74LS73.pdf Datasheet