Part # 54AC377 datasheet

Part Manufacturer: National Semiconductor

National Semiconductor

Part Description: 54AC377 54ACT377 Octal D Flip-Flop with Clock Enable

Part Details:

54AC377 February 1999 54AC377 · 54ACT377 ·54ACT377 Octal D Flip-Flop with Clock Enable General Description n Ideal for addressable register applications n Clock enable for address and data synchronization The AC/ ACT377 has eight edge-triggered, D-type flip-flops applications with individual D inputs and Q outputs. The common buff- n Eight edge-triggered D flip-flops ered Clock (CP) input loads all flip-flops simultaneously, Octal when the Clock Enable (CE) is LOW. n Buffered common clock n Outputs source/sink 24 mA The register is fully edge-triggered. The state of each D in-put, one setup time before the LOW-to-HIGH clock transi- n See 273 for master reset version tion, is transferred to the corresponding flip-flop s Q output. n See 373 for transparent latch version D The CE input must be stable only one setup time prior to the n See 374 for TRI-STATE® version LOW-to-HIGH clock transition for predictable operation. n ACT377 has TTL-compatible inputs Flip-Flop n Standard Microcircuit Drawing (SMD) Features -- AC377: 5962-88702-- ACT377: 5962-87697 n I reduced by 50% CC Logic Symbols with IEEE/IEC Clock Enable DS100290-1 DS100290-2 Pin Description Names D ­D Data Inputs 0 7 CE Clock Enable (Active LOW) Q ­Q Data Outputs 0 7 CP Clock Pulse Input

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54AC377.pdf Datasheet