Part # 74F273 datasheet

Part Manufacturer: Fairchild Semiconductor

Fairchild Semiconductor

Part Description: 74F273 Octal D-Type Flip-Flop

Part Details:

74F273 April 1988 Revised September 2000 Octa 74F273 l D-T Octal D-Type Flip-Flop ype General Description Features Fl The 74F273 has eight edge-triggered D-type flip-flops with s Ideal buffer for MOS microprocessor or memory ip- individual D inputs and Q outputs. The common buffered s Eight edge-triggered D-type flip-flops Clock (CP) and Master Reset (MR) inputs load and reset s F Buffered common clock (clear) all flip-flops simultaneously. lo s Buffered, asynchronous Master Reset The register is fully edge-triggered. The state of each D p input, one setup time before the LOW-to-HIGH clock transi- s See 74F377 for clock enable version tion, is transferred to the corresponding flip-flop s Q output. s See 74F373 for transparent latch version All outputs will be forced LOW independently of Clock or s See 74F374 for 3-STATE version Data inputs by a LOW voltage level on the MR input. Thedevice is useful for applications where the true output onlyis required and the Clock and Master Reset are common toall storage elements. Ordering Code: Order Number Package Number Package Description 74F273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009511 Unit Loading/Fan Out

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74F273.pdf Datasheet