Part # Application Notes Automotive Eeprom Serial AN2014 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: How a designer can make the most of STMicroelectronics Serial EEPROMs


Part Details:

AN2014 Application note How a designer can make the most of STMicroelectronics Serial EEPROMs Electrically erasable and programmable memory (EEPROM) devices are standard products,used for the non-volatile storage of parameters and fine-granularity data. There is no single memory technology (SRAM, DRAM, EEPROM, Flash Memory, EPROM,ROM) that meets an application s needs perfectly. Consequently, the designer needs toknow the particular strengths and weaknesses of each technology before selecting the bestcompromise for use in any given application. He can then design the application to keepwithin the specification, for the best performance, best reliability and lowest failure rates.Lately, this involves understanding at least the general principles of how the devices, in thegiven technology, are constructed, and how they work. This document has been designed to give precisely this level of background understandingfor one of those technologies: EEPROM, from STMicroelectronics. It describes howSTMicroelectronics EEPROM is constructed, how it works, and gives useful guidelines forachieving high reliability applications under some of the most stringent conditions, such asthose that are experienced in the automotive market. June 2008 Rev 5 1/64 www.st.com Contents AN2014 Contents 1 Construction of an EEPROM device . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Floating gate operation within an EEPROM cell . . . . . . . . . . . . . . . . . . . . 7 1.1.1 Reading the value stored in a memory cell . . . . . . . . . . . . . . . . . . . . . . . 9 1.1.2 Writing a new value to the memory cell . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.1.3 Cycling limit of EEPROM cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.2 Electrical structure of ST serial EEPROM arrays . . . . . . . . . . . . . . . . . . . 14 1.2.1 Memory array architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1.2.2 Decoding architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.2.3 Intrinsic electrical stress induced by programming . . . . . . . . . . . . . . . . 15 2 Choosing a suitable EEPROM for your application . . . . . . . . . . . . . . . 17 2.1 Choosing a memory type suited to the task to be performed . . . . . . . . . . 17 2.2 Choosing an appropriate memory interface . . . . . . . . . . . . . . . . . . . . . . . 17 2.3 Choosing an appropriate supply voltage and temperature range . . . . . . 18 3 Recommendations to improve EEPROM reliability . . . . . . . . . . . . . . . 19 3.1 Electrostatic discharges (ESD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.1.1 What is ESD? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.1.2 How to prevent ESD? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.1.3 ST EEPROM ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.2 Electrical overstress and latch-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2.1 What are EOS and latch-up? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20


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