Part # 54F109 datasheet

Part Manufacturer: National Semiconductor

National Semiconductor

Part Description: 54F 74F109 Dual J not K not Positive Edge-Triggered Flip-Flop


Part Details:

54F/74F109 54F/74F109 November 1994 54F/74F109 Dual Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to C sets Q to LOW level D JK Clear and Set are independent of clock The F109 consists of two high-speed, completely indepen-dent transition clocked JK flip-flops. The clocking operation Simultaneous LOW on C and S makes both Q and Q D D Positive is independent of rise and fall times of the clock waveform. HIGH The JK design allows operation as a D flip-flop (refer to F74data sheet) by connecting the J and K inputs. Features Asynchronous Inputs: n Guaranteed 4000V minimum ESD protection. LOW input to S sets Q to HIGH level D Edge-T Ordering Code: See Section 0 DSXXX Commercial Military Package Package Description Number riggered 74F109PC N16E 16-Lead (0.300" Wide) Molded Dual-in-Line 54F109DM (Note 2) J16A 16-Lead Ceramic Dual-in-Line 74F109SC (Note 1) M16A 16-Lead (0.150" Wide) Molded Small Outline,JEDEC 74F109SJ (Note 1) M16D 16-Lead (0.300" Wide) Molded Small Outline, Flip-Flop EIAJ 54F109FM (Note 2) W16A 16-Lead Cerpack 54F109LM (Note 2) E20A 16-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13" reel. Use suffix = SCX and SJX. Note 2: Military grade device with environmental and burn-in processing. Use suffix = DMQB, FMQB and LMQB.


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54F109.pdf Datasheet