Part # 74ACT109 datasheet

Part Manufacturer: Fairchild Semiconductor

Fairchild Semiconductor

Part Description: 74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop


Part Details:

74A C109, March 2007 74A 74AC109, 74ACT109 tm CT109 Dual JK P Dual JK Positive Edge-Triggered Flip-Flop Features General Description ICC reduced by 50% The AC/ACT109 consists of two high-speed completely Outputs source/sink 24mA independent transition clocked JK flip-flops. The clocking ACT109 has TTL-compatible inputs operation is independent of rise and fall times of theclock waveform. The JK design allows operation as aD-Type flip-flop (refer to AC/ACT74 data sheet) by ositive Edg connecting the J and K inputs together. Asynchronous Inputs: ­ LOW input to SD (Set) sets Q to HIGH level­ LOW input to CD (Clear) sets Q to LOW level e-T ­ Clear and Set are independent of clock ­ Simultaneous LOW on CD and SD makes both rig Q and Q HIGH gered Flip-Flop Ordering Information Order Package Number Number Package Description 74AC109SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74AC109SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC109MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT109SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74AC109MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT109PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering number. Connection Diagram Pin Descriptions Pin Names


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74ACT109.pdf Datasheet