Part # MAX3624 datasheet

Part Manufacturer: Maxim

Maxim

Part Description: MAX3624 DS


Part Details:

19-0977; Rev 1; 11/07 EVALUATION KIT AVAILABLE Low-Jitter, Precision Clock Generator with Four Outputs MAX3624 General Description Features The MAX3624 is a low-jitter precision clock generator Crystal Oscillator Interface: 19.375MHz to 27MHz optimized for networking applications. The device inte- CMOS Input: 19MHz to 40.5MHz grates a crystal oscillator and a phase-locked loop(PLL) clock multiplier to generate high-frequency clock Output Frequencies outputs for Ethernet, Fibre Channel, SONET/SDH, and Ethernet: 62.5MHz, 125MHz, 156.25MHz, other networking applications. 312.5MHz Fibre Channel: 106.25MHz, 159.375MHz, Maxim s proprietary PLL design features ultra-low jitter 212.5MHz, 318.5MHz (0.36psRMS) and excellent power-supply noise rejec-tion, minimizing design risk for network equipment. SONET/SDH: 77.76MHz, 155.52MHz, 311.04MHz The MAX3624 has three LVPECL outputs and one Low Jitter LVCMOS output. Selectable output dividers and a 0.14psRMS (1.875MHz to 20MHz) selectable feedback divider allow a range of output 0.36psRMS (12kHz to 20MHz) frequencies. Excellent Power-Supply Noise Rejection Applications No External Loop Filter Capacitor Required Ethernet Networking Equipment Ordering Information Fibre Channel Storage Area Network PKG SONET/SDH Network PART TEMP RANGE PIN-PACKAGE CODE MAX3624UTJ+ 0°C to +85°C 32 TQFN-EP* T3255-3 Pin Configuration and Typical Application Circuit appear at +Denotes a lead-free package. end of data sheet. *EP = Exposed pad. Block Diagram IN_SEL MR BYPASS SELA[1:0] QAC_OE LVCMOS


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MAX3624.pdf Datasheet