Part # MAX5877 datasheet

Part Manufacturer: Maxim


Part Description: MAX5877 DS

Part Details:

19-3632; Rev 2; 3/07 EVALUATION KIT AVAILABLE 14-Bit, 250Msps, High-Dynamic-Performance, Dual DAC with LVDS Inputs MAX5877 General Description Features The MAX5877 is an advanced 14-bit, 250Msps, dual 250Msps Output Update Rate digital-to-analog converter (DAC). This DAC meets the Noise Spectral Density = -160dBFS/Hz demanding performance requirements of signal synthesis at fOUT = 16MHz applications found in wireless base stations and other Excellent SFDR and IMD Performance communications applications. Operating from +3.3V and SFDR = 75dBc at f +1.8V supplies, this dual DAC offers exceptional dynamic OUT = 16MHz (to Nyquist) SFDR = 71dBc at f performance such as 75dBc spurious-free dynamic range OUT = 80MHz (to Nyquist) IMD = -87dBc at f (SFDR) at f OUT = 10MHz OUT = 16MHz and supports update rates of 250Msps, with a power dissipation of only 287mW. IMD = -73dBc at fOUT = 80MHz ACLR = 75dB at f The MAX5877 utilizes a current-steering architecture OUT = 61MHz that supports a 2mA to 20mA full-scale output current 2mA to 20mA Full-Scale Output Current range, and allows a 0.1VP-P to 1VP-P differential output LVDS-Compatible Digital and Clock Inputs voltage swing. The device features an integrated +1.2V On-Chip +1.20V Bandgap Reference bandgap reference and control amplifier to ensure Low 287mW Power Dissipation high-accuracy and low-noise performance. A separate Compact 68-Pin QFN-EP Package (10mm x 10mm) reference input (REFIO) allows for the use of an exter-nal reference source for optimum flexibility and Evaluation Kit Available (MAX5878EVKIT) improved gain accuracy. The clock inputs of the MAX5877 accept both LVDS Ordering Information and LVPECL-compatible voltage levels. The device fea- PIN- PKG tures an interleaved data input that allows a single PART TEMP RANGE PACKAGE CODE

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MAX5877.pdf Datasheet