Part # AD7788 AD7789 datasheet

Part Manufacturer: Analog Devices

Analog Devices

Part Description: AD7788/AD7789 Low Power 16-/24-Bit Sigma-Delta ADCs Data Sheet (Rev. B)

Part Details:

Low Power, 16-/24-Bit, Sigma-Delta ADCs AD7788/AD7789 FEATURES FUNCTIONAL BLOCK DIAGRAM AD7788: 16-bit resolution REFIN(+) REFIN(­) GND VDD AD7789: 24-bit resolution AD7788/ Power AD7789 CLOCK Supply: 2.5 V to 5.25 V operation Normal: 75 A maximum AIN(+) DOUT/RDY - SERIAL DIN Power-down: 1 A maximum ADC* INTERFACE AIN(­) AND SCLK RMS noise: 1.5 V CONTROL LOGIC CS AD7788: 16-bit p-p resolution AD7789: 19-bit p-p resolution (21.5 bits effective) 1-00 *AD7788: 16-BIT ADC Integral nonlinearity: 3.5 ppm typical 539 AD7789: 24-BIT ADC 03 Simultaneous 50 Hz and 60 Hz rejection Figure 1. Internal clock oscillator GENERAL DESCRIPTION VDD monitor channel 10-lead MSOP The AD7788/AD7789 are low power, low noise, analog front ends for low frequency measurement applications. The AD7789 contains a low noise, 24-bit, - ADC with one differential INTERFACE input. The AD7788 is a 16-bit version of the AD7789. 3-wire serial The devices operate from an internal clock. Therefore, the SPI®-, QSPITM-, MICROWIRETM-, and DSP-compatible user does not have to supply a clock source to the devices. Schmitt trigger on SCLK The output data rate is 16.6 Hz, which gives simultaneous

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AD7788 AD7789.pdf Datasheet