Part # 74AC138 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: 3 to 8 line decoder (inverting)

Part Details:

74AC138 3 TO 8 LINE DECODER (INVERTING) s HIGH SPEED: t PD = 4.5ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION:ICC = 4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY:VNIH = VNIL = 28 % VCC (MIN.) s 50 TRANSMISSION LINE DRIVING CAPABILITY DIP SOP TSSOP s SYMMETRICAL OUTPUT IMPEDANCE:|IOH| = IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: ORDER CODES tPLH tPHL PACKAGE TUBE T & R s OPERATING VOLTAGE RANGE:V DIP 74AC138B CC (OPR) = 2V to 6V SOP 74AC138M 74AC138MTR s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138 TSSOP 74AC138TTR s IMPROVED LATCH-UP IMMUNITY or G2B is held high, the decoding function is DESCRIPTION inhibited and all the 8 outputs go to high. The 74AC138 is an advanced high-speed CMOS Tree enable inputs are provided to ease cascade 3 TO 8 LINE DECODER (INVERTING) fabricated connection and application of address decoders with sub-micron silicon gate and double-layer for memory systems. metal wiring C2MOS tecnology. All inputs and outputs are equipped with If the device is enabled, 3 binary select inputs (A, protection circuits against static discharge, giving B, and C) determine which one of the outputs will them 2KV ESD immunity and transient excess go low. If enable input G1 is held low or either G2A voltage.

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74AC138.pdf Datasheet