Part # STPIC6C595 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: Power logic 8-bit shift register


Part Details:

STPIC6C595 Power logic 8-bit shift register Features Low RDS(on): 4 typ 30 mJ avalanche energy Eight 100 mA DMOS outputs 250 mA current limit capability 33 V output clamp voltage Device are cascadable SO-16 TSSOP16 Low power consumption Description This STPIC6C595 is a monolithic, medium- When data in the output buffers is low, the DMOS voltage, low current power 8-bit shift register transistor outputs are off. When data is high, the designed for use in systems that require relatively DMOS transistor outputs have sink-current moderate load power such as LEDs. The device capability. The SER OUT allows for cascading of contains a built-in voltage clamp on the outputs the data from the shift register to additional for inductive transient protection. Power driver devices. applications include relays, solenoids, and other Output are low-side, open-drain DMOS low-current or medium-voltage loads. transistors with output ratings of 33 V and 100 mA The device contains an 8-bit serial-in, parallel-out continuous sink-current capability. Each output shift register that feeds an 8-bit D-type storage provides a 250 mA maximum current limit at register. Data transfers through both the shift and TC = 25 °C. The current limit decreases as the storage register clock (SRCK) and the register junction temperature increases for additional clock (RCK), respectively. The device transfers device protection. The device also provides up to data out the serial output (SER OUT) port on the 1.5KV of ESD protection when tested using the rising edge of SRCK. The storage register human-body model and 150 V machine model. transfers data to the output buffer when shift The STPIC6C595 is characterized for operation register clear (CLR) is high. When CLR is low, the over the operating case temperature range of input shift register is cleared. When output enable -40 °C to 125 °C. (G) is held high, all data in the output buffer is held low and all drain output are off. When G is held low, data from the storage register is transparent to the output buffer. Table 1. Device summary Order codes Package Packaging STPIC6C595MTR SO-16 (Tape and reel)


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STPIC6C595.pdf Datasheet