Part # 74LS348 datasheet

Part Manufacturer: Motorola

Motorola

Part Description: 74LS348


Part Details:

SN54/74LS348 8-INPUT PRIORITY ENCODERS SN54/74LS848 WITH 3-STATE OUTPUTS The SN54 / 74LS348 and the SN54 / 74LS848 are eight input priority encod- ers which provide the 8-line to 3-line function. The outputs (A0 ­ A2) and inputs (0 ­ 7) are active low. The active low input 8-INPUT PRIORITY ENCODERS which has the highest priority (input 7 has the highest) is represented on the WITH 3-STATE OUTPUTS outputs (output A0 is the lowest bit). An example would be if inputs 1, 2 and 4were low, then a binary 4 would be represented on the outputs. LOW POWER SCHOTTKY The GS (Group Signal) output is active low when any of the inputs are low. It serves to indicate when any of the inputs are active. A0, A1 and A2 are three-state outputs. This allows for up to 64 line expan- sion without the need for special external circuitry. A logical one on the Enable Input (EI) forces A0, A1 ared A2 to the disabled J SUFFIX state and outputs GS and EO to the high state. A high on all data inputs (0 ­ 7) CERAMIC together with a low on the EI input disables outputs A0, A1, and A2 and forces CASE 620-09 output GS to the high state and output EO to the low state. 16 Use of the EI input in conjunction with the EO output provides for the capa- 1 bility of having priority encoding of n input signals. The LS848 has special internal circuitry providing for a greatly reduced neg- ative going glitch on the GS (Group Signal) output and on a reduced tendency N SUFFIX PLASTIC for the A0, A1 and A2 outputs to become momentarily enabled. Both of these CASE 648-08 occurrences happen when the EI input goes from a logical one to a logical zero 16 and all data inputs (0 ­ 7) are held at logical ones. The internal glitch reduction 1 circuitry does add an additional fan-in of one on all data inputs (compared tothat of the LS348). D SUFFIX OUTPUTS INPUTS SOIC 16 OUTPUT CASE 751B-03 1 VCC EO GS 3 2 1 0 A0 16


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