Part # AD9515 datasheet

Part Manufacturer: Analog Devices

Analog Devices

Part Description: AD9515 1.6 GHz Clock Distribution IC Dividers Delay Adjust Two Outputs Data Sheet (Rev. 0)


Part Details:

1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs AD9515 FEATURES FUNCTIONAL BLOCK DIAGRAM 1.6 GHz differential clock input RSET VS GND 2 programmable dividers AD9515 LVPECL Divide-by in range from1 to 32 OUT0 Phase select for coarse delay adjust /1. . . /32 1.6 GHz LVPECL clock output OUT0B Additive output jitter 225 fs rms CLK 800 MHz/250 MHz LVDS/CMOS clock output CLKB LVDS/CMOS Additive output jitter 300 fs rms/290 fs rms OUT1 Time delays up to 10 ns /1. . . /32 t SYNCB OUT1B Device configured with 4-level logic pins Space-saving, 32-lead LFCSP SETUP LOGIC APPLICATIONS VREF S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 Low jitter, low phase noise clock distribution 05597-001 Figure 1. Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers High performance instrumentation Broadband infrastructure ATE GENERAL DESCRIPTION The AD9515 features a two-output clock distribution IC in a The LVDS/CMOS output features a delay element with three design that emphasizes low jitter and phase noise to maximize selectable full-scale delay values (1.5 ns, 5 ns, and 10 ns), each


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AD9515.pdf Datasheet