Part # Brief SPEAR-09-H022 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: SPEArdatasheet Head ARM 926, 200K customizable eASICdatasheet gates, large IP portfolio SoC


Part Details:

SPEAR-09-H022 SPEArTM Head ARM 926, 200K customizable eASICTM gates, large IP portfolio SoC DATA BRIEF Features ARM926EJ-S - fMAX 266 MHz, 32 KI - 16 KD cache, 8 KI - KD tcm, ETM9 and JTAG interfaces 200K customizable equivalent ASIC gates (16K LUT equivalent) with 8 channels internal DMA high speed accelerator function and 112 dedicated general purpose I/Os PBGA420 Multilayer AMBA 2.0 compliant Bus with fMAX 133 MHz Programmable internal clock generator with ADC 8 bits, 230 Ksps, 16 analog input enhanced PLL function, specially optimized for channels E.M.I. reduction Real Time Clock 16 KB single port SRAM embedded WatchDog Dynamic RAM interface: 4 General Purpose Timers 16 bit DDR, 32 / 16 bit SDRAM Operating temperature: - 40 to 85 °C SPI interface connecting serial ROM and Flash Package: PBGA 384+36 6R (23x23x2.16 mm) devices 2 USB 2.0 Host independent ports with Overview integrated PHYs USB 2.0 Device with integrated PHY SPEAr Head is a powerful digital enginebelonging to SPEAr family, the innovative Ethernet MAC 10/100 with MII management customizable System on Chips. interface The device integrates an ARM core with a large 3 independent UARTs up to 115 Kbps set of proven IPs (Intellectual Properties) and a (Software Flow Control mode) configurable logic block that allows very fast I2C Master mode - Fast and Slow speed customization of unique and/or proprietary 6 General Purpose I/Os solutions, with low effort and low investment. Optimized for embedded applications. Order codes Part number Op. Temp. range, °C Package Packing SPEAR-09-H022 -40 to 85 PBGA420 (23x23x2.16 mm) Tray Rev 2


Please click the following link to download the datasheet:

Brief SPEAR-09-H022.pdf Datasheet