Part # AD9549 datasheet

Part Manufacturer: Analog Devices

Analog Devices

Part Description: AD9549 Dual Input Network Clock Generator/Synchronizer Data Sheet (Rev. 0)

Part Details:

Dual Input Network Clock Generator/Synchronizer AD9549 FEATURES APPLICATIONS Flexible reference inputs Network synchronization Input frequencies: 8 kHz to 750 MHz Reference clock jitter cleanup Two reference inputs SONET/SDH clocks up to OC-192, including FEC Loss of reference indicators Stratum 3/3E reference clocks Auto and manual holdover modes Wireless base stations, controllers Auto and manual switchover modes Cable infrastructure Smooth A-to-B phase transition on outputs Data communications Excellent stability in holdover mode GENERAL DESCRIPTION Programmable 16 + 1-bit input divider, R Differential HSTL clock output The AD9549 provides synchronization for many systems, Output frequencies to 750 MHz including synchronous optical networks (SONET/SDH). The Low jitter clock doubler for frequencies > 400 MHz AD9549 generates an output clock, synchronized to one of two Single-ended CMOS output for frequencies < 150 MHz external input references. The external references may contain Programmable digital loop filter (< 1 Hz to ~100 kHz) significant time jitter, also specified as phase noise. Using a High speed digitally controlled oscillator (DCO) core digitally controlled loop and holdover circuitry, the AD9549 DDS with integrated 14-bit DAC continues to generate a clean (low jitter), valid output clock Excellent dynamic performance during a loss of reference condition, even when both references Programmable 16 + 1-bit feedback divider, S have failed. Software controlled power-down The AD9549 operates over an industrial temperature range of 64-lead LFCSP package -40°C to +85°C. AD9549 S1 TO S4 FDBK_IN FILTER DAC_OUT REFA_IN REFERENCE OUT R

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AD9549.pdf Datasheet