Part # 74LVX273 datasheet

Part Manufacturer: Fairchild Semiconductor

Fairchild Semiconductor

Part Description: 74LVX273 Low Voltage Octal D-Type Flip-Flop

Part Details:

74L June 1993 VX27 Revised April 2005 3 Low V 74LVX273Low Voltage Octal D-Type Flip-Flop oltage Oct General Description Features The LVX273 has eight edge-triggered D-type flip-flops with s Input voltage translation from 5V to 3V individual D inputs and Q outputs. The common buffered s Ideal for low power/low noise 3.3V applications Clock (CP) and Master Reset (MR) input load and reset s Guaranteed simultaneous switching noise level and (clear) all flip-flops simultaneously. a dynamic threshold performance l D-T The register is fully edge-triggered. The state of each Dinput, one setup time before the LOW-to-HIGH clock transi-tion, is transferred to the corresponding flip-flop s Q output. ype Fl All outputs will be forced LOW independently of Clock orData inputs by a LOW voltage level on the MR input. Thedevice is useful for applications where the true output only ip- is required and the Clock and Master Reset are common toall storage elements. The inputs tolerate up to 7V allowing F interface of 5V systems to 3V systems. lop Ordering Code: Order Number Package Number Package Description 74LVX273M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVX273SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending letter suffix "X" to the ordering code.Pb-Free package per JEDEC J-STD-020B. Logic Symbols Connection Diagram IEEE/IEC Truth Table Pin Descriptions Operating Mode Inputs Outputs MR CP Dn Qn Pin Names

Please click the following link to download the datasheet:

74LVX273.pdf Datasheet