Part # HCF4099 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: 8-BIT ADDRESSABLE LATCH


Part Details:

HCF4099B 8 BIT ADDRESSABLE LATCH s SERIAL DATA INPUT - ACTIVE PARALLEL OUTPUT s STORAGE REGISTER CAPABILITY - MASTER CLEAR s CAN FUNCTION AS DEMULTIPLEXER s QUIESCENT CURRENT SPECIFIED UP TO 20V DIP SOP s STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS s INPUT LEAKAGE CURRENT ORDER CODES II = 100nA (MAX) AT VDD = 18V TA = 25°C PACKAGE TUBE T & R s 100% TESTED FOR QUIESCENT CURRENT DIP HCF4099BEY s MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS SOP HCF4099BM1 HCF4099M013TR FOR DESCRIPTION OF B SERIES CMOS DEVICES" WRITE DISABLE is high, data entry is inhibited; DESCRIPTION however, all 8 outputs can be continuously read HCF4099B is a monolithic integrated circuit independent of WRITE DISABLE and address fabricated in Metal Oxide Semiconductor inputs. A master RESET input is available, which technology available in DIP and SOP packages. resets all bits to a logic "0" level when RESET and HCF4099B, an 8-bit addressable latch, is a WRITE DISABLE are at a high level. When serial-input, parallel output storage register that RESET is at a high level, and WRITE DISABLE is can perform a variety of functions. Data is input to at a low level, the latch acts as a 1-of-8 a particular bit in the latch when that bit is demultiplexer ; the bit that is addressed has an addressed (by means of input A0, A1, A2) and active output which follows the data input, while all when WRITE DISABLE is at a low level. When unaddressed bits are held to a logic "0" level. PIN CONNECTION


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HCF4099.pdf Datasheet