Part # FIN1022 datasheet

Part Manufacturer: Fairchild Semiconductor

Fairchild Semiconductor

Part Description: FIN1022 2 X 2 LVDS High Speed Crosspoint Switch


Part Details:

FIN1022 2 X September 2001 Revised December 2001 FIN1022 2 L 2 X 2 LVDS High Speed Crosspoint Switch VDS High Speed Crosspoi General Description Features This non-blocking 2x2 crosspoint switch has a fully differ- s Low jitter, 800 Mbps full differential data path ential input to output data path for low noise generation and s Worst case jitter of 190ps low pulse width distortion. The device can be used as a with PRBS = 223 - 1 data pattern at 800 Mbps high speed crosspoint switch, 2:1 multiplexer, 1:2 demulti-plexer or 1:2 signal splitter. The inputs can directly interface s Rail-to-rail common mode range is 0.5V to 3.25V with LVDS and LVPECL levels. s Worst case power dissipation is less than 126 mWs Open-circuit fail safe protections Fast switch time of 1.1 ns typicals 35 ps typical pin channel to channel skews 3.3V power supply operations Non-blocking switch nt Swit s LVDS receiver inputs accept LVPECL signals directlys 7.5 kV HBM ESD protections 16-lead SOIC package and TSSOP packages Inter-operates with TIA/EIA 644-1995 specification ch s See the Fairchild Interface Solutions web page for cross reference information: www.fairchildsemi.com/products/interface/lvds.html Ordering Code: Order Number Package Number Package Description FIN1022M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow FIN1022MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Logic Symbol © 2001 Fairchild Semiconductor Corporation DS500653 www.fairchildsemi.com Connection Diagram Pin Descriptions Pin Name Description FIN1022 RIN0+, RIN1+ LVDS non-inverting data inputs RIN0-, RIN1- LVDS inverting data inputs DOUT0+, DOUT1+ LVDS non-inverting data outputsDOUT0-, DOUT1- LVDS inverting data outputsEN0 LVTTL input for enabling DOUT0+/DOUT0- EN1 LVTTL input for enabling DOUT1+/DOUT1- SEL0


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FIN1022.pdf Datasheet