Part # M74HC259 datasheet

Part Manufacturer: ST Microelectronics

ST Microelectronics

Part Description: 8 bit addressable latch


Part Details:

M74HC259 8 BIT ADDRESSABLE LATCH s HIGH SPEED : tPD = 20 ns (TYP.) at VCC = 6V s LOW POWER DISSIPATION:ICC =4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY:VNIH = VNIL = 28 % VCC (MIN.) s SYMMETRICAL OUTPUT IMPEDANCE: DIP SOP TSSOP |IOH| = IOL = 4mA (MIN) s BALANCED PROPAGATION DELAYS:tPLH tPHL ORDER CODES s WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T & R VCC (OPR) = 2V to 6V DIP M74HC259B1R s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 259 SOP M74HC259M1R M74HC259RM13TR TSSOP M74HC259TTR DESCRIPTIONThe M74HC259 is an high speed CMOS 8 BIT latches remain in their previous state, unaffected ADDRESSABLE LATCH fabricated with silicon by changes on the data or address inputs. To gate C2MOS technology. eliminate the possibility of entering erroneous data The M74HC259 has single data input (D) 8 latch into the latches, the ENABLE should be held high outputs (Q0-Q7), 3 address inputs (A, B, and C), (inactive) while the address lines are changing. If common enable input (E), and a common CLEAR ENABLE is held high and CLEAR is taken low all input. To operate this device as an addressable eight latches are cleared to the low state. If latch, data is held on the D input, and the address ENABLE is low all latches except the addressed of the latch into which the data is to be entered is latch will be cleared. The addressed latch will held on the A, B, and C inputs. When ENABLE is instead follow the D input, effectively taken low the data flows through to the addresses


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M74HC259.pdf Datasheet